Staff directory
Hui Chen
Postdoctoral Researcher
hui.chen(ELIMINAR)@icn2.cat
Advanced Electron Nanoscopy
- ORCID: 0000-0003-3020-8649
Publications
2015
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Nanoscale conductive pattern of the homoepitaxial AlGaN/GaN transistor
Pérez-Tomás A., Catalàn G., Fontserè A., Iglesias V., Chen H., Gammon P.M., Jennings M.R., Thomas M., Fisher C.A., Sharma Y.K., Placidi M., Chmielowska M., Chenot S., Porti M., Nafría M., Cordier Y. Nanotechnology; 26 (11, 115203) 2015. 10.1088/0957-4484/26/11/115203. IF: 3.821
The gallium nitride (GaN)-based buffer/barrier mode of growth and morphology, the transistor electrical response (25-310 C) and the nanoscale pattern of a homoepitaxial AlGaN/GaN high electron mobility transistor (HEMT) have been investigated at the micro and nanoscale. The low channel sheet resistance and the enhanced heat dissipation allow a highly conductive HEMT transistor (Ids>1 A mm-1) to be defined (0.5 A mm-1 at 300 C). The vertical breakdown voltage has been determined to be ∼850 V with the vertical drain-bulk (or gate-bulk) current following the hopping mechanism, with an activation energy of 350 meV. The conductive atomic force microscopy nanoscale current pattern does not unequivocally follow the molecular beam epitaxy AlGaN/GaN morphology but it suggests that the FS-GaN substrate presents a series of preferential conductive spots (conductive patches). Both the estimated patches density and the apparent random distribution appear to correlate with the edge-pit dislocations observed via cathodoluminescence. The sub-surface edge-pit dislocations originating in the FS-GaN substrate result in barrier height inhomogeneity within the HEMT Schottky gate producing a subthreshold current. © 2015 IOP Publishing Ltd.
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Simulations of a lateral PiN diode on Si/SiC substrate for high temperature applications
Chan C.W., Gammon P.M., Shah V.A., Chen H., Jennings M.R., Fisher C.A., Pérez-Tomás A., Myronov M., Mawby P.A. Materials Science Forum; 821-823: 624 - 627. 2015. 10.4028/www.scientific.net/MSF.821-823.624.
Simulations are presented of a lateral PiN power diode on a Si/SiC substrate for harsh environment, high temperature applications. Thermal simulations compare the Si/SiC solution to SOI, Si/SiO2/SiC, bulk Si and SiC, showing that the Si/SiC architecture, with its thin Si film intimately formed on SiC, displays significant thermal advantages over any other Si solution, and is comparable to bulk SiC. Detailed electrical simulations show that in comparison to the same device in SOI, a Si/SiC PiN diode offers no deterioration of the on-state performance, improved self-heating effects at increased current and can potentially support higher breakdown voltages. © (2015) Trans Tech Publications, Switzerland.